module top(input inc,
           input dec,
           input clk,
           input rst);
[5:0] reg dia, mes;
[11:0] reg ano;

always @(posedge clk or posedge rst)
begin
    if (rst) begin
        dia <= 6'd1;
        mes <= 6'd1;
        ano <= 11'd2013;
    end else begin
        if (inc and not dec) begin
            if (((mes == 6'd4) or
                 (mes == 6'd6) or
                 (mes == 6'd9) or
                 (mes == 6'd11)) and (dia == 6'd30))
             begin
                 dia <= 6'd1;
                 mes <= mes + 1'd1; 
             end else if (mes == 6'd2) and dia == 6'd27)
                 dia <= 6'd1;
                 mes <= mes + 1'd1;
             end else if (mes == 6'd12 and dia == 6'd31)
                 dia <=6'd1;
                 mes <= 6'd1;
                 ano <= ano + 1'd1;

             end else if (dia == 6'd31) begin
                 dia <= 6'd1;
                 mes <= mes + 6'd1;
             end else 
                 dia <= dia + 1;
                 
             end


        end
    end


end


endmodule
